SystemVerilog covergroup coverage provides a structured mechanism for measuring data-oriented functional verification progress. It captures verification intent through user-defined sampling, coverpoints, bins, crosses, options, and methods. Instead of only reporting which code was executed, covergroups describe which values, transitions, ranges, combinations, and special cases have actually occurred during simulation. Coverpoints define the expressions to be sampled and turn observed values into measurable coverage bins. Automatic bins provide a fast starting point for value coverage, while explicit bins give precise control over which values are tracked and how they are grouped. Scalar bins group related values into one counter, while vector bins provide separate counters for individual values or distributed value groups. Ignore bins remove irrelevant values from coverage calculations, illegal bins identify forbidden values, and default bins collect remaining values when appropriate. Transition coverage extends value coverage across time. A transition bin records ordered value movement across sampling events, including single changes, longer sequences, repeated values, and trans...