UPF Power Intent from Definition to Implementation
Implement IEEE 1801 UPF power intent by defining supply sets, power domains, retention, isolation, level shifting, power states, top-level supply assignments, implementation details, and power switches for consistent low-power design realization.
Implement IEEE 1801 UPF power intent by defining supply sets, power domains, retention, isolation, level shifting, power states, top-level supply assignments, implementation details, and power switches for consistent low-power design realization.
This resource includes
Description
IEEE 1801 UPF provides a formal method for implementing power intent independently from functional RTL. It describes how power is supplied, distributed, controlled, and constrained across a multi-domain design. This specification layer makes low-power architecture explicit, allowing tools to analyze power behavior consistently during simulation, verification, synthesis, and physical implementation. The implementation flow begins with logical power architecture definition. Supply sets group related electrical functions such as power, ground, and bias supplies. Power domains define the regions of hierarchy that share common power behavior. Together, these constructs establish the power boundaries, supply relationships, and domain ownership needed for power-aware analysis and low-power cell insertion. Retention, isolation, and level-shifter strategies define the functional safety mechanisms around power transitions and voltage crossings. Retention strategies preserve selected sequential state when a domain loses power. Isolation strategies clamp outputs from powered-down regions to known values, preventing unknown propagation into active logic. Level-shifter strategies identify volt...
This resource includes
Description
IEEE 1801 UPF provides a formal method for implementing power intent independently from functional RTL. It describes how power is supplied, distributed, controlled, and constrained across a multi-domain design. This specification layer makes low-power architecture explicit, allowing tools to analyze power behavior consistently during simulation, verification, synthesis, and physical implementation. The implementation flow begins with logical power architecture definition. Supply sets group related electrical functions such as power, ground, and bias supplies. Power domains define the regions of hierarchy that share common power behavior. Together, these constructs establish the power boundaries, supply relationships, and domain ownership needed for power-aware analysis and low-power cell insertion. Retention, isolation, and level-shifter strategies define the functional safety mechanisms around power transitions and voltage crossings. Retention strategies preserve selected sequential state when a domain loses power. Isolation strategies clamp outputs from powered-down regions to known values, preventing unknown propagation into active logic. Level-shifter strategies identify volt...
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