Power has become a first-order design constraint across modern digital integrated circuits. High-performance processors are limited by average power, peak current, thermal gradients, packaging capability, and power delivery, while portable and deeply embedded electronics are limited by finite stored energy. Battery capacity improves slowly compared with computational capability, and energy harvesting provides only a restricted power budget at small physical volumes. These limits make energy efficiency essential across systems ranging from large computing infrastructure to wireless sensor nodes and near-invisible electronics. The distinction between power and energy is therefore fundamental: average power determines sustained thermal load, peak power stresses the power delivery network, and total energy determines operating lifetime under a finite energy source. CMOS technology scaling creates additional constraints rather than eliminating the problem. Historical reductions in feature size initially combined higher transistor density with lower supply voltage, helping control dynamic power. Continued voltage scaling becomes increasingly difficult because adequate performance requir...