Real Number Modeling for Mixed-Signal VerificationEDA AcademyResource5.00 ratingsEnglish5 lecturesAll Level$0.00$99.99
Static Timing Analysis for Digital Design ClosureEDA AcademyResource5.00 ratingsEnglish7 lecturesAll Level$0.00$69.99
MemberMeasuring Functional Verification Quality and CompletenessEDA AcademyResource5.01 ratingsEnglish6 lecturesAll Level$0.00$89.99
MemberDigital Systems with Verilog HDLEDA AcademyResource5.01 ratingsEnglish6 lecturesAll Level$0.00$59.99
Low-Power Simulation and Verification MethodologyEDA AcademyResource5.00 ratingsEnglish8 lecturesAll Level$0.00$99.99
MemberPredictable Hardware Design with Synthesis-Oriented RTLEDA AcademyResource5.01 ratingsEnglish6 lecturesAll Level$0.00$59.99
Iterative Design Optimization in Physical ImplementationEDA AcademyResource5.00 ratingsEnglish5 lecturesAll Level$0.00$119.99
Getting Started with Formal VerificationEDA AcademyResource5.00 ratingsEnglish5 lecturesAll Level$0.00$209.99
MemberManaging the Logic Synthesis FlowEDA AcademyResource5.01 ratingsEnglish6 lecturesAll Level$0.00$59.99
MemberReliable X-Propagation Analysis for Digital VerificationEDA AcademyResource5.01 ratingsEnglish5 lecturesAll Level$0.00$159.99